AVR Butterfly JTAG Pins For General I/O

The JTAG-interface of the ATmega169 on the AVR Butterfly is enabled by default. While JTAG is enabled the four JTAG-pins PF4-PF7 (connected to PORT J402 of the AVR Butterfly) can not be used for general Input and Output. If JTAG debugging is not needed there are two possibilities to make those pins available:

Disable the JTAG-Interface by Fuse

Connect the Butterfly to an Serial-In-System programmer (i.e. STK500) thru the ISP-port (J403) and (un-)program the JTAG Interface Enable (JTAGEN) fuse. This is bit 6 in the High Fuse Byte and has to be "unprogrammed" (=1) to disable the JTAG interface. The bootloader does not support fuse-bit programming so changeing the fuses is only available via ISP-programming (...or JTAG-programming - but this only once...) so some solder-work is needed for this method.

Disable the JTAG-Interface by Software

To disable the JTAG interface by software (without the need for soldering an extra pin-header) the JTD-bit in the MCUCR register has to be written to logic one two times in four cycles. To achive this the two write accesses should be wrapped by an interrupt control. For example like this in avr-gcc/avr-libc:

#include <avr/io.h>
#include <avr/interrupt.h>

[...]

void disable_JTAG(void)
{
	unsigned char sreg;

	sreg = SREG;
	cli();
	MCUCR |= ( 1 <<JTD );
	MCUCR |= ( 1 <<JTD );
	SREG = sreg;
}

[...]

Call the routine at application startup. Mind the output-level of the pins in the time between application start-up and JTAG-disable. For more Information see the ATMEL ATmega169 datasheet.

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Martin Thomas
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Last mod.: Friday, 08-Dec-2006 22:24:58 CET